1. Field of the Invention
The present invention relates to a switching regulator and power supply using the same.
2. Description of the Related Art
One of the conventional switching regulator or series regulator for use in supplying a stabilized constant voltage by lowering a voltage inputted from an external voltage source is disclosed in, e.g., JP9-37545A, 1997, paragraphs 0002 to 0004, FIGS. 2 and 3.
In the conventional switching regulator, the stabilized constant voltage is obtained by switching on and off a transistor connected in series with a current route from the external voltage source, thereby supplying a smoothing circuit with a required electric power only. Therefore, a loss of the electric power is smaller, although an accuracy in the outputted voltage is lower.
On the other hand, in the conventional series regulator, the stabilized constant voltage is obtained by increasing and decreasing a driving power of a transistor connected in series with the current route, thereby minutely controlling a voltage between terminals of that transistor. Therefore, although the loss of the electric power is greater, the accuracy in the outputted voltage is higher. This is because the electric power is unnecessarily consumed by the above-mentioned transistor.
Therefore, there is disclosed in JP6-335238A, 1994, paragraphs 0002 to 0005, FIG. 3, an improved power supply comprising both the switching regulator and series regulator which are connected in series with the current route. Here, the switching regulator lowers, under a smaller power loss, a voltage from the external voltage source of which voltage is higher than a prescribed voltage, down to an intermediate voltage slightly above that prescribed voltage, while the series regulator lowers the intermediate voltage precisely onto the prescribed voltage. Thus, the electric power is not excessively consumed by the series regulator and moreover the accuracy in the outputted voltage becomes higher.
FIG. 7 is a circuit diagram of an example of the above-mentioned power supply comprising both the switching regulator and series regulator.
The power supply 101 as shown in FIG. 7 comprises: an input filter 2 (low pass filter) comprising a coil L1 and condenser C1 for removing a high frequency noise superposed through the current route from the external voltage source; a switching regulator 60 for generating the intermediate voltage V3 by lowering a voltage V1 inputted from the external voltage source through the input filter 2; and a series regulator 40 for lowering V3 in order to generate the prescribed voltage V4 which is an output from the power supply 101.
The switching regulator 60 comprises: a MOS-FET 4 inserted into the current route; a smoothing circuit 5 for smoothing the output from FET 4; a regulating IC 61 for turning on and off FET 4 in order to keep constant the output V3 from FET 4.
The series regulator 40 comprises: a resistance R2 for detecting an electric current I1 flowing through the switching regulator 60 into the series regulator 40; a bipolar transistor 7 connected with the R2 and inserted into the current route; and a regulating IC 41 for controlling a base current of the transistor 7, detecting V3 and, an electric current I2 flowing into the transistor 7 and turning off the transistor 7 if V1 and I2 are excessive.
Further, the smoothing circuit 5 in the switching regulator 60 comprises: a low pass filter comprising a coil L2 and condenser C2; and a flywheel diode D2 for emitting an electromagnetic energy stored during turning-on of FET 4, by turning itself on during turning-off of FET 4.
Further, the regulating IC 61 comprises: a voltage dividing circuit 32 for dividing V3; a comparison signal generating circuit 33 for generating a comparison signal as stated later; a pulse width modulation (PWM) signal circuit 34 for generating a PWM signal of which duty ratio (an on-time:a period) is dependent upon a level of that comparison signal; and a soft start circuit 37 for having the PWM circuit 34 generate a PWM signal of which duty ration is suppressed.
The regulating IC 61 further comprises: a charge pump 35 which takes in an electric power from a current route between the input filter 2 and FET 4 every prescribed time interval and steps up the high level voltage of the PWM signal (amplitude of the PWM signal) up to a voltage which can keeps FET 4 turned on (voltage greater than a threshold voltage of FET 4 plus a source voltage when FET 4 is turned on); a pre-driving circuit 36 steps up the PWM signal amplitude and supply the gate of FET 4 with an output voltage V2.
Here, the charge pump 35 stores the electric power taken in from the curent route into a plurality of condensers connected in series with each other, thereby supplying the pre-driving circuit 36 with the stepped-up voltage.
Further, the comparison signal generating circuit 33 comprises: a voltage generating circuit 331 for generating a reference voltage Vref if V1 is greater than a prescribed voltage, e.g., 4.5 V; and an operational amplifier 333 for amplifying a difference between a divided voltage from the voltage dividing circuit 32 and Vref from the voltage generating circuit 331, thereby generating the comparison signal.
Here, the level of the above-mentioned comparison signal is made positive if the divided voltage is greater than Vref, is made negative if the divided voltage is smaller than Vref and is made zero if the divided voltage is equal to Vref.
Further, the PWM circuit 34 comprises: a reference wave generating circuit 341 for generating a triangular wave vibrating to the positive and negative directions around 0 V; an operational amplifier 342 for generating the above-mentioned PWM signal by comparing the triangular wave and the above-mentioned comparison signal. Here, the operational amplifier 342 generates the PWM signal of which duty ratio becomes greater as the divided voltage becomes smaller compared with Vref.
Further, the soft start circuit 37 is a condenser C3 of which one end is connected with the inverting input terminal of the operational amplifier 333 and of which another end is grounded. Further, a resistance R3 is inserted between the output terminal of the voltage generation circuit 331 and the inverting input terminal of the operational amplifier 333.
Thus, when the power supply 101 is started and voltage generating circuit 331 generates Vref, C3 is charged up through R3, thereby gradually increasing the voltage level inputted into the inverting terminal of the operational amplifier 333, whereby that voltage level finally reaches a prescribed Vref.
Therefore, the soft start circuit 37 prevents a rush current from flowing into the transistor 7 under a transient state. As regards the soft start circuit, it is disclosed in, e.g., JP6-250747A, 1994, paragraphs 0016 to 0017, FIG. 1.
In general, the rush current is generated, when a sudden voltage change is caused when starting up the power supply, by a delayed and excessive control when a feed-back system for generating the PWM signal cannot follow that sudden voltage change. However, the rush current may possibly be caused, even when the power supply 101 is once stabilized after completing the operation of the soft start circuit 37, i.e., even when V1 or V3 is lowered for a short time period due to some cause and afterward it returns back to its original value, as shown in FIG. 8.
However, the conventional soft start circuit 37 has a disadvantage that it cannot completely exhibit the soft start function against the above-mentioned short-time-period voltage drop, because the conventional soft start circuit 37 may fail to discharge rapidly enough all the stored charges during the above-mentioned short time period. Therefore, the conventional switching regulator and power supply using the same has a disadvantage that it may possibly allow the rush current in I1 to flow, as shown in FIG. 8.